Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 
 
Software Version and Target Device
Product Version: ISE:11.5 (WebPack) Target Family: spartan3e
OS Platform: NT Target Device: xc3s500e
Project ID (random number) b8675cefe0b6403896d7e2e4e5ee70c9.5b750a1bab774d34912a6c4c9895963d.30 Target Package: fg320
Registration ID 0_0_372 Target Speed: -4
Date Generated Fri Jul 2 13:35:52 2010
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Multiplexers=28
  • 1-bit 3-to-1 multiplexer=1
  • 1-bit 32-to-1 multiplexer=16
  • 1-bit 4-to-1 multiplexer=1
  • 1-bit 5-to-1 multiplexer=1
  • 1-bit 6-to-1 multiplexer=1
  • 1-bit 7-to-1 multiplexer=1
  • 1-bit 8-to-1 multiplexer=2
  • 32-bit 4-to-1 multiplexer=5
 Multipliers=3
  • 19x8-bit registered multiplier=2
  • 32x19-bit multiplier=1
 Counters=5
  • 24-bit up counter=1
  • 32-bit up counter=1
  • 4-bit down counter=1
  • 64-bit up counter=2
 Comparators=33
  • 16-bit comparator greatequal=1
  • 16-bit comparator greater=1
  • 16-bit comparator less=3
  • 2-bit comparator greater=3
  • 2-bit comparator lessequal=2
  • 23-bit comparator greatequal=1
  • 23-bit comparator greater=3
  • 23-bit comparator less=1
  • 32-bit comparator greatequal=3
  • 32-bit comparator greater=3
  • 32-bit comparator less=1
  • 4-bit comparator greater=2
  • 4-bit comparator lessequal=2
  • 64-bit comparator less=2
  • 8-bit comparator equal=2
  • 8-bit comparator greatequal=2
  • 8-bit comparator lessequal=1
 RAMs=6
  • 1024x23-bit single-port block RAM=1
  • 256x16-bit single-port block RAM=1
  • 256x32-bit single-port block RAM=4
 Adders/Subtractors=38
  • 11-bit adder=4
  • 13-bit adder carry out=2
  • 16-bit adder=1
  • 18-bit adder carry out=1
  • 2-bit subtractor=3
  • 23-bit adder=4
  • 23-bit adder carry in=1
  • 23-bit addsub=1
  • 23-bit subtractor=3
  • 32-bit adder=4
  • 32-bit subtractor=2
  • 64-bit adder=2
  • 8-bit adder=10
 Xors=3
  • 1-bit xor2=3
 Registers=1971
  • Flip-Flops=1971
 		MiscellaneousStatistics
  • AGG_BONDED_IO=150
  • AGG_IO=150
  • AGG_SLICE=3200
  • NUM_4_INPUT_LUT=5784
  • NUM_BONDED_IBUF=13
  • NUM_BONDED_IOB=137
  • NUM_BUFGMUX=3
  • NUM_CYMUX=1028
  • NUM_IOB_FF=71
  • NUM_LUT_RT=301
  • NUM_MULT18X18SIO=7
  • NUM_MULTAND=147
  • NUM_RAMB16=7
  • NUM_SLICEL=3136
  • NUM_SLICEM=64
  • NUM_SLICE_FF=2064
  • NUM_XOR=762
 		NetStatistics
  • NumNets_Active=6717
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=60
  • NumNodesOfType_Active_BRAMDUMMY=552
  • NumNodesOfType_Active_CLKPIN=1516
  • NumNodesOfType_Active_CNTRLPIN=1491
  • NumNodesOfType_Active_DOUBLE=16652
  • NumNodesOfType_Active_DUMMY=20049
  • NumNodesOfType_Active_DUMMYBANK=178
  • NumNodesOfType_Active_DUMMYESC=29
  • NumNodesOfType_Active_GLOBAL=265
  • NumNodesOfType_Active_HFULLHEX=167
  • NumNodesOfType_Active_HLONG=27
  • NumNodesOfType_Active_HUNIHEX=1011
  • NumNodesOfType_Active_INPUT=22451
  • NumNodesOfType_Active_IOBOUTPUT=37
  • NumNodesOfType_Active_OMUX=6316
  • NumNodesOfType_Active_OUTPUT=6290
  • NumNodesOfType_Active_PREBXBY=5236
  • NumNodesOfType_Active_VFULLHEX=779
  • NumNodesOfType_Active_VLONG=147
  • NumNodesOfType_Active_VUNIHEX=1351
  • NumNodesOfType_Gnd_BRAMADDR=7
  • NumNodesOfType_Gnd_BRAMDUMMY=151
  • NumNodesOfType_Gnd_CLKPIN=3
  • NumNodesOfType_Gnd_DOUBLE=80
  • NumNodesOfType_Gnd_DUMMYBANK=27
  • NumNodesOfType_Gnd_INPUT=214
  • NumNodesOfType_Gnd_OMUX=89
  • NumNodesOfType_Gnd_OUTPUT=48
  • NumNodesOfType_Gnd_PREBXBY=28
  • NumNodesOfType_Gnd_VFULLHEX=8
  • NumNodesOfType_Vcc_BRAMDUMMY=7
  • NumNodesOfType_Vcc_CNTRLPIN=3
  • NumNodesOfType_Vcc_INPUT=39
  • NumNodesOfType_Vcc_PREBXBY=31
  • NumNodesOfType_Vcc_VCCOUT=40
 SiteStatistics
  • IBUF-DIFFM=3
  • IBUF-DIFFMI=2
  • IBUF-DIFFS=4
  • IBUF-DIFFSI=1
  • IBUF-IOB=1
  • IOB-DIFFM=65
  • IOB-DIFFS=62
  • SLICEL-SLICEM=1479
 		SiteSummary
  • BUFGMUX=3
  • BUFGMUX_GCLKMUX=3
  • BUFGMUX_GCLK_BUFFER=3
  • IBUF=13
  • IBUF_IFD_DELAY=8
  • IBUF_IFF1=8
  • IBUF_INBUF=13
  • IBUF_PAD=13
  • IOB=137
  • IOB_INBUF=24
  • IOB_OFF1=47
  • IOB_OUTBUF=137
  • IOB_PAD=137
  • IOB_TFF1=16
  • MULT18X18SIO=7
  • MULT18X18SIO_MULT18X18SIO=7
  • RAMB16=7
  • RAMB16_RAMB16=7
  • RAMB16_RAMB16A=7
  • SLICEL=3136
  • SLICEL_C1VDD=74
  • SLICEL_C2VDD=72
  • SLICEL_CYMUXF=526
  • SLICEL_CYMUXG=502
  • SLICEL_F=2802
  • SLICEL_F5MUX=315
  • SLICEL_F6MUX=48
  • SLICEL_FAND=74
  • SLICEL_FFX=1266
  • SLICEL_FFY=798
  • SLICEL_G=2854
  • SLICEL_GAND=73
  • SLICEL_GNDF=220
  • SLICEL_GNDG=207
  • SLICEL_VDDF=1
  • SLICEL_XORF=386
  • SLICEL_XORG=376
  • SLICEM=64
  • SLICEM_F=64
  • SLICEM_F5MUX=64
  • SLICEM_F6MUX=64
  • SLICEM_G=64
 
Configuration Data
BUFGMUX
  • S=[S_INV:3] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:3]
  • S=[S_INV:3] [S:0]
 IBUF
  • ICLK1=[ICLK1_INV:0] [ICLK1:8]
  • SR=[SR:8] [SR_INV:0]
 IBUF_IFF1
  • CK=[CK:8] [CK_INV:0]
  • IFF1_INIT_ATTR=[INIT0:8]
  • IFF1_SR_ATTR=[SRLOW:8]
  • IFFATTRBOX=[SYNC:8]
  • LATCH_OR_FF=[FF:8]
  • SR=[SR:8] [SR_INV:0]
 IBUF_INBUF
  • IFD_DELAY_VALUE=[DLY3:8]
 IBUF_PAD
  • IOATTRBOX=[LVCMOS25:13]
 IOB
  • O1=[O1_INV:0] [O1:137]
  • OCE=[OCE:0] [OCE_INV:47]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:47]
  • T1=[T1_INV:16] [T1:8]
  • TCE=[TCE_INV:16] [TCE:0]
 IOB_OFF1
  • CE=[CE:0] [CE_INV:47]
  • CK=[CK:47] [CK_INV:0]
  • D=[D:47] [D_INV:0]
  • LATCH_OR_FF=[FF:47]
  • OFF1_INIT_ATTR=[INIT0:47]
 IOB_OUTBUF
  • IN=[IN_INV:0] [IN:137]
  • TRI=[TRI_INV:0] [TRI:24]
 IOB_PAD
  • DRIVEATTRBOX=[12:137]
  • IOATTRBOX=[LVCMOS25:91] [LVCMOS33:46]
  • SLEW=[SLOW:137]
 IOB_TFF1
  • CE=[CE:0] [CE_INV:16]
  • CK=[CK:16] [CK_INV:0]
  • D=[D:0] [D_INV:16]
  • LATCH_OR_FF=[FF:16]
  • TFF1_INIT_ATTR=[INIT1:16]
 MULT18X18SIO
  • CEA=[CEA_INV:0] [CEA:7]
  • CEB=[CEB_INV:0] [CEB:7]
  • CEP=[CEP:7] [CEP_INV:0]
  • CLK=[CLK:7] [CLK_INV:0]
  • RSTA=[RSTA:7] [RSTA_INV:0]
  • RSTB=[RSTB:7] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:7]
 MULT18X18SIO_MULT18X18SIO
  • AREG=[0:7]
  • BREG=[0:5] [1:2]
  • B_INPUT=[CASCADE:3] [DIRECT:4]
  • CEA=[CEA_INV:0] [CEA:7]
  • CEB=[CEB_INV:0] [CEB:7]
  • CEP=[CEP:7] [CEP_INV:0]
  • CLK=[CLK:7] [CLK_INV:0]
  • PREG=[0:7]
  • PREG_CLKINVERSION=[0:7]
  • RSTA=[RSTA:7] [RSTA_INV:0]
  • RSTB=[RSTB:7] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:7]
 RAMB16
  • CLKA=[CLKA_INV:0] [CLKA:7]
  • ENA=[ENA_INV:0] [ENA:7]
  • SSRA=[SSRA_INV:0] [SSRA:7]
  • WEA=[WEA:7] [WEA_INV:0]
 RAMB16_RAMB16A
  • CLKA=[CLKA_INV:0] [CLKA:7]
  • ENA=[ENA_INV:0] [ENA:7]
  • PORTA_ATTR=[512X36:4] [2048X9:1] [1024X18:2]
  • SSRA=[SSRA_INV:0] [SSRA:7]
  • WEA=[WEA:7] [WEA_INV:0]
  • WRITEMODEA=[WRITE_FIRST:7]
 SLICEL
  • BX=[BX_INV:0] [BX:586]
  • BY=[BY:298] [BY_INV:3]
  • CE=[CE:945] [CE_INV:98]
  • CIN=[CIN_INV:0] [CIN:482]
  • CLK=[CLK:1450] [CLK_INV:0]
  • SR=[SR:256] [SR_INV:97]
 SLICEL_CYMUXF
  • 0=[0:525] [0_INV:0]
  • 1=[1_INV:0] [1:526]
 SLICEL_CYMUXG
  • 0=[0:502] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:315] [S0_INV:0]
 SLICEL_F6MUX
  • S0=[S0:48] [S0_INV:0]
 SLICEL_FFX
  • CE=[CE:862] [CE_INV:85]
  • CK=[CK:1266] [CK_INV:0]
  • D=[D:1266] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:1219] [INIT1:47]
  • FFX_SR_ATTR=[SRLOW:1209] [SRHIGH:57]
  • LATCH_OR_FF=[FF:1266]
  • REV=[REV_INV:0] [REV:34]
  • SR=[SR:177] [SR_INV:85]
  • SYNC_ATTR=[ASYNC:1038] [SYNC:228]
 SLICEL_FFY
  • CE=[CE:558] [CE_INV:54]
  • CK=[CK:798] [CK_INV:0]
  • D=[D:795] [D_INV:3]
  • FFY_INIT_ATTR=[INIT0:739] [INIT1:59]
  • FFY_SR_ATTR=[SRLOW:718] [SRHIGH:80]
  • LATCH_OR_FF=[FF:798]
  • SR=[SR:166] [SR_INV:53]
  • SYNC_ATTR=[ASYNC:579] [SYNC:219]
 SLICEL_XORF
  • 1=[1_INV:0] [1:386]
 SLICEM
  • BX=[BX_INV:0] [BX:64]
  • BY=[BY:64] [BY_INV:0]
 SLICEM_F
  • LUT_OR_MEM=[LUT:64]
 SLICEM_F5MUX
  • S0=[S0:64] [S0_INV:0]
 SLICEM_F6MUX
  • S0=[S0:64] [S0_INV:0]
 SLICEM_G
  • LUT_OR_MEM=[LUT:64]
 
Pin Data
BUFGMUX
  • I0=3
  • O=3
  • S=3
 BUFGMUX_GCLKMUX
  • I0=3
  • OUT=3
  • S=3
 BUFGMUX_GCLK_BUFFER
  • IN=3
  • OUT=3
 IBUF
  • I=5
  • ICLK1=8
  • IQ1=8
  • PAD=13
  • SR=8
 IBUF_IFD_DELAY
  • IN=8
  • OUT=8
 IBUF_IFF1
  • CK=8
  • D=8
  • Q=8
  • SR=8
 IBUF_INBUF
  • IN=13
  • OUT=13
 IBUF_PAD
  • PAD=13
 IOB
  • I=24
  • O1=137
  • OCE=47
  • OTCLK1=47
  • PAD=137
  • T1=24
  • TCE=16
 IOB_INBUF
  • IN=24
  • OUT=24
 IOB_OFF1
  • CE=47
  • CK=47
  • D=47
  • Q=47
 IOB_OUTBUF
  • IN=137
  • OUT=137
  • TRI=24
 IOB_PAD
  • PAD=137
 IOB_TFF1
  • CE=16
  • CK=16
  • D=16
  • Q=16
 MULT18X18SIO
  • A0=7
  • A1=7
  • A10=7
  • A11=7
  • A12=7
  • A13=7
  • A14=7
  • A15=7
  • A16=7
  • A17=7
  • A2=7
  • A3=7
  • A4=7
  • A5=7
  • A6=7
  • A7=7
  • A8=7
  • A9=7
  • B0=4
  • B1=4
  • B10=4
  • B11=4
  • B12=4
  • B13=4
  • B14=4
  • B15=4
  • B16=4
  • B17=4
  • B2=4
  • B3=4
  • B4=4
  • B5=4
  • B6=4
  • B7=4
  • B8=4
  • B9=4
  • BCIN0=3
  • BCIN1=3
  • BCIN10=3
  • BCIN11=3
  • BCIN12=3
  • BCIN13=3
  • BCIN14=3
  • BCIN15=3
  • BCIN16=3
  • BCIN17=3
  • BCIN2=3
  • BCIN3=3
  • BCIN4=3
  • BCIN5=3
  • BCIN6=3
  • BCIN7=3
  • BCIN8=3
  • BCIN9=3
  • BCOUT0=3
  • BCOUT1=3
  • BCOUT10=3
  • BCOUT11=3
  • BCOUT12=3
  • BCOUT13=3
  • BCOUT14=3
  • BCOUT15=3
  • BCOUT16=3
  • BCOUT17=3
  • BCOUT2=3
  • BCOUT3=3
  • BCOUT4=3
  • BCOUT5=3
  • BCOUT6=3
  • BCOUT7=3
  • BCOUT8=3
  • BCOUT9=3
  • CEA=7
  • CEB=7
  • CEP=7
  • CLK=7
  • P0=7
  • P1=7
  • P10=3
  • P11=3
  • P12=3
  • P13=3
  • P14=3
  • P15=3
  • P16=3
  • P17=3
  • P18=3
  • P19=3
  • P2=7
  • P20=3
  • P21=3
  • P22=3
  • P3=7
  • P4=7
  • P5=7
  • P6=3
  • P7=3
  • P8=3
  • P9=3
  • RSTA=7
  • RSTB=7
  • RSTP=7
 MULT18X18SIO_MULT18X18SIO
  • A0=7
  • A1=7
  • A10=7
  • A11=7
  • A12=7
  • A13=7
  • A14=7
  • A15=7
  • A16=7
  • A17=7
  • A2=7
  • A3=7
  • A4=7
  • A5=7
  • A6=7
  • A7=7
  • A8=7
  • A9=7
  • B0=4
  • B1=4
  • B10=4
  • B11=4
  • B12=4
  • B13=4
  • B14=4
  • B15=4
  • B16=4
  • B17=4
  • B2=4
  • B3=4
  • B4=4
  • B5=4
  • B6=4
  • B7=4
  • B8=4
  • B9=4
  • BCIN0=3
  • BCIN1=3
  • BCIN10=3
  • BCIN11=3
  • BCIN12=3
  • BCIN13=3
  • BCIN14=3
  • BCIN15=3
  • BCIN16=3
  • BCIN17=3
  • BCIN2=3
  • BCIN3=3
  • BCIN4=3
  • BCIN5=3
  • BCIN6=3
  • BCIN7=3
  • BCIN8=3
  • BCIN9=3
  • BCOUT0=3
  • BCOUT1=3
  • BCOUT10=3
  • BCOUT11=3
  • BCOUT12=3
  • BCOUT13=3
  • BCOUT14=3
  • BCOUT15=3
  • BCOUT16=3
  • BCOUT17=3
  • BCOUT2=3
  • BCOUT3=3
  • BCOUT4=3
  • BCOUT5=3
  • BCOUT6=3
  • BCOUT7=3
  • BCOUT8=3
  • BCOUT9=3
  • CEA=7
  • CEB=7
  • CEP=7
  • CLK=7
  • P0=7
  • P1=7
  • P10=3
  • P11=3
  • P12=3
  • P13=3
  • P14=3
  • P15=3
  • P16=3
  • P17=3
  • P18=3
  • P19=3
  • P2=7
  • P20=3
  • P21=3
  • P22=3
  • P3=7
  • P4=7
  • P5=7
  • P6=3
  • P7=3
  • P8=3
  • P9=3
  • RSTA=7
  • RSTB=7
  • RSTP=7
 RAMB16
  • ADDRA10=7
  • ADDRA11=7
  • ADDRA12=7
  • ADDRA13=7
  • ADDRA3=1
  • ADDRA4=3
  • ADDRA5=7
  • ADDRA6=7
  • ADDRA7=7
  • ADDRA8=7
  • ADDRA9=7
  • CLKA=7
  • DIA0=7
  • DIA1=7
  • DIA10=6
  • DIA11=6
  • DIA12=6
  • DIA13=6
  • DIA14=6
  • DIA15=6
  • DIA16=4
  • DIA17=4
  • DIA18=4
  • DIA19=4
  • DIA2=7
  • DIA20=4
  • DIA21=4
  • DIA22=4
  • DIA23=4
  • DIA24=4
  • DIA25=4
  • DIA26=4
  • DIA27=4
  • DIA28=4
  • DIA29=4
  • DIA3=7
  • DIA30=4
  • DIA31=4
  • DIA4=7
  • DIA5=7
  • DIA6=7
  • DIA7=7
  • DIA8=6
  • DIA9=6
  • DIPA0=7
  • DIPA1=6
  • DIPA2=4
  • DIPA3=4
  • DOA0=7
  • DOA1=7
  • DOA10=6
  • DOA11=6
  • DOA12=6
  • DOA13=6
  • DOA14=6
  • DOA15=6
  • DOA16=4
  • DOA17=4
  • DOA18=4
  • DOA19=4
  • DOA2=7
  • DOA20=4
  • DOA21=4
  • DOA22=4
  • DOA23=4
  • DOA24=4
  • DOA25=4
  • DOA26=4
  • DOA27=4
  • DOA28=4
  • DOA29=4
  • DOA3=7
  • DOA30=4
  • DOA31=4
  • DOA4=7
  • DOA5=6
  • DOA6=6
  • DOA7=6
  • DOA8=6
  • DOA9=6
  • DOPA0=1
  • DOPA1=1
  • ENA=7
  • SSRA=7
  • WEA=7
 RAMB16_RAMB16
  • ADDRA=7
  • DIA=7
  • DOA=7
 RAMB16_RAMB16A
  • ADDRA=7
  • ADDRA10=7
  • ADDRA11=7
  • ADDRA12=7
  • ADDRA13=7
  • ADDRA3=1
  • ADDRA4=3
  • ADDRA5=7
  • ADDRA6=7
  • ADDRA7=7
  • ADDRA8=7
  • ADDRA9=7
  • CLKA=7
  • DIA=7
  • DIA0=7
  • DIA1=7
  • DIA10=6
  • DIA11=6
  • DIA12=6
  • DIA13=6
  • DIA14=6
  • DIA15=6
  • DIA16=4
  • DIA17=4
  • DIA18=4
  • DIA19=4
  • DIA2=7
  • DIA20=4
  • DIA21=4
  • DIA22=4
  • DIA23=4
  • DIA24=4
  • DIA25=4
  • DIA26=4
  • DIA27=4
  • DIA28=4
  • DIA29=4
  • DIA3=7
  • DIA30=4
  • DIA31=4
  • DIA4=7
  • DIA5=7
  • DIA6=7
  • DIA7=7
  • DIA8=6
  • DIA9=6
  • DIPA0=7
  • DIPA1=6
  • DIPA2=4
  • DIPA3=4
  • DOA=7
  • DOA0=7
  • DOA1=7
  • DOA10=6
  • DOA11=6
  • DOA12=6
  • DOA13=6
  • DOA14=6
  • DOA15=6
  • DOA16=4
  • DOA17=4
  • DOA18=4
  • DOA19=4
  • DOA2=7
  • DOA20=4
  • DOA21=4
  • DOA22=4
  • DOA23=4
  • DOA24=4
  • DOA25=4
  • DOA26=4
  • DOA27=4
  • DOA28=4
  • DOA29=4
  • DOA3=7
  • DOA30=4
  • DOA31=4
  • DOA4=7
  • DOA5=6
  • DOA6=6
  • DOA7=6
  • DOA8=6
  • DOA9=6
  • DOPA0=1
  • DOPA1=1
  • ENA=7
  • SSRA=7
  • WEA=7
 SLICEL
  • BX=586
  • BY=301
  • CE=1043
  • CIN=482
  • CLK=1450
  • COUT=502
  • F1=2779
  • F2=2606
  • F3=2479
  • F4=1898
  • F5=64
  • FX=32
  • FXINA=48
  • FXINB=48
  • G1=2847
  • G2=2655
  • G3=2448
  • G4=1916
  • SR=353
  • X=1570
  • XB=6
  • XQ=1266
  • Y=1847
  • YQ=798
 SLICEL_C1VDD
  • 1=74
 SLICEL_C2VDD
  • 1=72
 SLICEL_CYMUXF
  • 0=525
  • 1=526
  • OUT=526
  • S0=526
 SLICEL_CYMUXG
  • 0=502
  • 1=502
  • OUT=502
  • S0=502
 SLICEL_F
  • A1=2779
  • A2=2606
  • A3=2479
  • A4=1898
  • D=2802
 SLICEL_F5MUX
  • F=315
  • G=315
  • OUT=315
  • S0=315
 SLICEL_F6MUX
  • 0=48
  • 1=48
  • OUT=48
  • S0=48
 SLICEL_FAND
  • 0=74
  • 1=74
  • O=74
 SLICEL_FFX
  • CE=947
  • CK=1266
  • D=1266
  • Q=1266
  • REV=34
  • SR=262
 SLICEL_FFY
  • CE=612
  • CK=798
  • D=798
  • Q=798
  • SR=219
 SLICEL_G
  • A1=2847
  • A2=2655
  • A3=2448
  • A4=1916
  • D=2854
 SLICEL_GAND
  • 0=73
  • 1=73
  • O=73
 SLICEL_GNDF
  • 0=220
 SLICEL_GNDG
  • 0=207
 SLICEL_VDDF
  • 1=1
 SLICEL_XORF
  • 0=386
  • 1=386
  • O=386
 SLICEL_XORG
  • 0=376
  • 1=376
  • O=376
 SLICEM
  • BX=64
  • BY=64
  • F1=64
  • F2=64
  • F3=64
  • F5=64
  • FX=64
  • FXINA=64
  • FXINB=64
  • G1=64
  • G2=64
  • G3=64
 SLICEM_F
  • A1=64
  • A2=64
  • A3=64
  • D=64
 SLICEM_F5MUX
  • F=64
  • G=64
  • OUT=64
  • S0=64
 SLICEM_F6MUX
  • 0=64
  • 1=64
  • OUT=64
  • S0=64
 SLICEM_G
  • A1=64
  • A2=64
  • A3=64
  • D=64
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s1200e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s1200e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -nt timestamp -i -p xc3s500e-fg320-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s500e-fg320-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
_impact 4 4 0 0 0 0 0
bitgen 111 109 0 0 0 0 0
bitinit 32 32 0 0 0 0 0
libgen 6 4 0 0 0 0 0
map 142 128 0 0 0 0 0
netgen 5 5 0 0 0 0 0
ngc2edif 3 3 0 0 0 0 0
ngcbuild 14 14 0 0 0 0 0
ngdbuild 151 150 0 0 0 0 0
par 120 107 8 0 0 0 0
platgen 14 11 0 0 0 0 0
psf2Edward 5 5 0 0 0 0 0
trce 107 107 0 0 0 0 0
xbash 160 157 0 0 0 0 0
xps 105 23 0 0 0 0 0
xst 499 473 0 0 0 0 0
 
Help Statistics
Search words with results
IO Standard ( 1 )
Unsuccessful Search words
vcco ( 1 )
Help files
/doc/usenglish/isehelp/ise_c_overview.htm ( 1 ) /doc/usenglish/isehelp/ise_c_pin_assignment_pace.htm ( 1 )
/doc/usenglish/isehelp/ite_c_overview.htm ( 1 ) /doc/usenglish/isehelp/spartan3e/libs_le_vcc.htm ( 1 )
/doc/usenglish/isehelp/sse_db_rename_bus.htm ( 1 )
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=Modelsim-SE Mixed
PROP_Top_Level_Module_Type=Schematic PROP_PreferredLanguage=Verilog
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_SCHEMATIC=1 FILE_UCF=1
FILE_VERILOG=20 FILE_VHDL=1
PROP_AutoTop=false PROP_DevDevice=xc3s500e
PROP_DevFamily=Spartan3E PROP_DevPackage=fg320
PROP_DevSpeed=-4 PROP_FitterReportFormat=HTML
PROP_SynthFsmEncode=None PROP_Top_Level_Module_Type=Schematic
PROP_UserConstraintEditorPreference=Constraints Editor PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No Project duration(days)=71